Sr. FPGA/ASIC Design Engineer (Starlink)

Company: SpaceX
Location: Irvine
Posted on: May 3, 2021

Job Description:

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.SR. FPGA/ASIC DESIGN ENGINEER (STARLINK)Would you like to become part of team developing silicon for Starlink's low earth orbit satellites that deliver broadband connectivity to the people who either do not have access to internet or have spotty connectivity? Come join the team working on silicon projects that are driving more integration, lower power, mixed signal architectures and next generation silicon technology for deployment in space and ground infrastructures.RESPONSIBILITIES:Design digital ASIC and/or FPGAs for Starlink satellites, implementing complex SoC blocks and SoC integration tasksParticipate in the design process starting with high-level conceptual and architectural discussions and ending with micro architecture and design partition within the ASIC/FPGAImplement design blocks using Verilog/System VerilogParticipate in all phases of ASIC/FPGA design flow (e.g. synthesis, timing closure)Work with backend teams to address any layout and timing issues for ASICsBring-up and validate ASICs and FPGAs in the labBASIC QUALIFICATIONS:Bachelor's degree in electrical engineering, computer engineering or computer science5+ years of experience working with FPGAs and/or ASICsPREFERRED SKILLS AND EXPERIENCE:Ability to solve complex problems including clock domain crossings and power optimizationExperience with latest simulation and verification methodologiesUnderstanding of data path pipelines, state machines and arithmetic operationsExposure to advanced timing closure techniquesExperience in Verilog, System Verilog and/or VHDLASIC/FPGA/SoC system integration experienceExperience with high reliability design and implementationsSoftware design and development skillsExcellent scripting skills (csh/bash, Perl, Python etc.)Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL Lint tools (e.g. Spyglass), FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)Ability to work in a dynamic environment with changing needs and requirementsTeam-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basisEnjoys being challenged and learning new skillsADDITIONALREQUIREMENTS:Must be willing to travel when needed (typically REQUIREMENTS:To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here. SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.SDL2017

Keywords: SpaceX, Irvine , Sr. FPGA/ASIC Design Engineer (Starlink), Other , Irvine, California