ASIC/FPGA Prototyping Design Engineer

Company: Apple
Location: Irvine
Posted on: March 21, 2023

Job Description:

ASIC/FPGA Prototyping Design Engineer
Irvine,California,United States
Hardware

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  Typically requires proven experience with bring up, debugging and verification on FPGA
  
  
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  Experience in FPGA development for wireless applications strongly preferred
  
  
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  Proven understanding of wireless standards, such as IEEE 802.11, Bluetooth is a plus
  
  
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  Experience with FPGA platforms: Dini, HAPS - including compilation, debug, performance and throughput tuning
  
  
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  Experience writing 'make' based build system
  
  
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  Experience with C++ and python highly desirable
  
  
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  Maintain common design platform for ASIC as well as FPGA, with considerations for memories, I/O Pads, gated clocks and complex generated clocks.
  
  
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  Design and verification using Verilog/System Verilog
  
  
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  Perform FPGA Synthesis, Place & Route, timing optimizations
  
  
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  Perform bring-up, debug, and validation of designs to achieve functional and performance goals
  
  
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  Create and execute plans to bring-up, debug, and validate designs
  
  
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  Thoroughly document and support each of above steps
  
  
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  Collaborate with cross-functional teams in order to define prototype hardware to evaluate new technologies and features
  
  
  Description
  As an ASIC/FPGA Prototyping Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will integrate industry standard and custom hardware IP into SoCs. You will work closely with SoC architects, IP developers to develop SoCs that meets the power, performance and area goals for Apple devices. You will help define the processes, methods and tools for design and implementation of large complex SoCs. You will develop and maintain methodology and flows checks for your design. Interact with our verification team to ensure appropriate validation and coverage goals are met. You'll ensure security assumptions for the chip are accurately implemented within the block/s. Collaboration with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process. - Creates emulation/Field Programmable Gate Array (FPGA) models from a register transfer level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools - Develops hardware and software collaterals and integrates it with the emulation/FPGA model - Tests and debugs the emulation/FPGA model and collaterals - Defines and develops new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-silicon and post-silicon functional validation as well as software development/validation - Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform - Collaborate with and provides guidance to pre-silicon Validation teams for optimizing pre-silicon validation environments, test suites and methodologies for emulation efficiency - Develops and applies automation aids, flows and scripts in support of emulation ease of use and improvement of equipment utilization - Front-end ASIC design experience - Micro-architecture and design of high-performance DMAs/data transfer engines/interconnects - Computer architecture, SoC fabrics/interconnects, memory controllers, arbitration, flow control, caching, etc - RTL design and verification - System Verilog, scripting and modeling languages (e.g. Python, Perl, C) Lint, formal equivalence - Verification test benches, coverage analysis, formal verification - Knowledge of bring-up and debug of FPGAs and silicon - Familiar with common on-chip bus protocols such as AMBA (AXI, AHB, APB) - Collaboration, schedule and resource planning, and task/team management skills
  Education & Experience
  BS+ 3 years of relevant experience. MS preferred.
  Additional Requirements
  
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  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
    
    Pay & Benefits
    
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    • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $115,000 and $217,500, and your base pay will depend on your skills, qualifications, experience, and location.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.Learn more (https://www.apple.com/careers/us/benefits.html) about Apple Benefits.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
      
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Keywords: Apple, Irvine , ASIC/FPGA Prototyping Design Engineer, Engineering , Irvine, California